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Sr. Manager Silicon Design Engineering

Company: AMD
Location: California City
Posted on: September 21, 2022

Job Description:

What you do at AMD changes everything

At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies - building blocks for gaming, immersive platforms, and the data center.

Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the "extra mile" to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.

Experienced Design Verification Manager

The successful candidate will lead AMD's System Management Unit (SMU) IP Verification team. As a leader of the verification team, you will own and guide the development and verification SMU subsystem. This group owns digital hardware verification and embedded software debug. Your hands-on mentorship of the small and hardworking verification engineering team will improve hardware and software security, cryptography, and computer architecture through the development of the secure boot and initialization firmware.

The Person

An experienced verification manager who has experience in leading teams to successful tape-outs.

Strong interpersonal and communication skills to work well as a mentor and to collaborate with our SoC integration and SoC DV teams. We value high analytical and problem-solving skills with close attention to detail.

Key Responsibilities

Lead the pre-silicon functional verification team, the team with a mandate to perform Hardware/Firmware co-verification using UVM System Verilog and C-DPI structured testbench.
Build test plans and drive verification and debug of embedded boot firmware functionality to complete functional test and code coverage goals
Develop and modify the System Verilog and C driven testbench and bus functional models as required to manage the verification process
Develop and execute subsystem tests using FW/HW co-verification methodology; and improve verification metrics
Debugging test failures to determine if it is a design or verification test defect, correcting test issues and working with the design team to correct defects.
Collaborate with a project manager and leaders on the subsystem verification delivery against the milestone requirements and regression metrics
Collaborate with team technical leads and architects on the process, methodology, and technical enhancements to design verification, to drive continuous improvement and positive change

Preferred Experience

Proven experience in verifying commercially successful IPs, Subsystems, and or SoCs
Strong ability to provide mentorship and guidance to junior and senior engineers, a very effective team player, must have strong technical management skills and provide a positive influence on team morale and culture
Must be expert in System Verilog, UVM and proficient in C-DPI methodology
Proficient in object-oriented programming (C++), scripting (Ruby, Python, Perl), and low-level programming languages
Excellent knowledge about standard bus/interface protocols (i.e., AXI, AHB, AMBA)
Must be a self-starter, and able to drive independently and efficiently challenging and time-critical tasks to on-time completion
Strong communication, Time Management, and Presentation Skills.

Academic Credentials

Major in Electronics and or Computer Engineering
Master's Degree preferred

AMD employees who will be working onsite at an AMD US facility, are encouraged to provide proof of being fully vaccinated against COVID-19 upon their start date. This is for the safety of our employees, and to permit AMD to be prepared in the event the stay on Executive Order 14042: Ensuring Adequate COVID Safety Protocols for Federal Contractors is lifted. AMD is not requiring exemption / accommodation submittals at this time.


Benefits offered are described here.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers. We consider candidates regardless of age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status. Please click here for more information.

Keywords: AMD, Lancaster , Sr. Manager Silicon Design Engineering, Executive , California City, California

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